Referenced Items are not available for this document.
The authors examined the origins of high-density trap states in silicon-on-insulator (SOI) layers by means of scanning probe microscopy measurements, I-V characteristics in MOSFETs, and micro-Raman measurements in SOI wafers, including bonded wafers and separation by implanted oxygen (SIMOX) wafers having different root-mean-square values of roughness at the SOI/buried oxide (BOX) interface. As a result, it was concluded that nanoscale roughness at the SOI/BOX interface causes local mechanical stress a few tens of nanometers from the interface and that this stress induces the SIMOX-specific high-density trap states for holes as well as for electrons in the SOI layers.
Published in:
Electron Device Letters, IEEE
(Volume:32
,
Issue:
3
)
Date of Publication: March 2011
- Page(s):
- 237 - 239
- ISSN :
- 0741-3106
- INSPEC Accession Number:
- 11833985
- Digital Object Identifier :
- 10.1109/LED.2010.2096195
- Date of Publication :
- 20 January 2011
- Date of Current Version :
- 22 February 2011
- Issue Date :
- March 2011
- Sponsored by :
- IEEE Electron Devices Society
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