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A 5.8-GHz CMOS frequency synthesizer for WLAN application

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3 Author(s)
Lin Jia ; Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore ; Bin Zhao ; Xiaojun Yuan

In this paper, we present a fully integrated 5.8GHz frequency synthesizer realized in 0.13μm CMOS technology. It incorporates a LC voltage controlled oscillator (VCO) which is capable of automatically adjusting its nominal center frequency to a desired frequency. A digital controlled band-switching topology employing Accumulation-Mode MOS varactors (AMOS) with virtual ground node was adopted to provide a wide-band frequency range to allow calibration for process and temperature variations (PTV). An optimal VCO gain (Kvco) method, allows Kvco to be small and be flat over a wide tuning range, results in good phase noise performance and loop linearity. To minimize the reference spurs and stabilize the loop bandwidth, a matched charge pump with a current correction technique for frequency synthesizer is proposed. The measured VCO tuning range is 400MHz from 5.70 GHz to 6.1GHz with a gain of 45MHz/V. The phase noise of the frequency synthesizer is -121dBc/Hz at 1MHz offset away from the 5.840GHz carrier. The synthesizer consumes 40mW dc power, and its reference spurs and settling time are -60dBm and 40μS respectively.

Published in:

Communication Systems (ICCS), 2010 IEEE International Conference on

Date of Conference:

17-19 Nov. 2010