By Topic

Impact of Self-Heating in SOI FinFETs on Analog Circuits and Interdie Variability

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

8 Author(s)
Udit Monga ; Department of Electronics and Telecommunications, Norwegian University of Science and Technology, and University Graduate Center (UNIK), Kjeller ; Jasmin Aghassi ; Domagoj Siprak ; Josef Sedlmeir
more authors

In this letter, we present an experimental evaluation of self-heating (SH) effects (SHEs) using S-parameter measurements for both n- and p-type SOI FinFETs. It is revealed that NFETs show a stronger SHE than PFETs, which ultimately leads to a higher variation of the intrinsic gain in NFETs. Our results also show that long-channel devices typically used in analog design show pronounced negative output conductance, which consequently leads to a negative intrinsic gain at low frequencies. Another implication of the strong SHE is that the interdie variability of the isothermal intrinsic gain gets “amplified” at lower frequencies due to SH.

Published in:

IEEE Electron Device Letters  (Volume:32 ,  Issue: 3 )