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Effect of solders, underfills and substrates on the reliability of flip-chip bonding of low-k semiconductor chips

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5 Author(s)
Kenji Terada ; Advanced Packaging Laboratory, KYOCERA SLC Technologies Corporation, 656 Ichimiyake, Yasu, Shiga, 520-2362, Japan ; Takayuki Nejime ; Takafumi Ooyoshi ; Kaoru Kobayashi
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This study investigated the effect of solders, underfills and substrates on the reliability of a flip-chip package, focusing on the low-k layer in a semiconductor chip. After reflow, cracking and/or delamination were found in the low-k layer under the bump when Sn-2.5Ag solder was used. However, Indium solder did not induce cracking or delamination. Its softness mitigated the stress evolution in the low-k layer. After underfilling, cracking was observed at the chip edge during a -55/125°C temperature shock test, when Indium was used with a higher glass transition temperature (Tg) underfill. Underfilling changed the maximum stress region to the chip edge from under the bump. However, when a low Tg underfill was used, no failure was observed up to 5800 cycles. Indium with a low Tg underfill had an advantage to enhance reliability of the low-k layer.

Published in:

2010 IEEE CPMT Symposium Japan

Date of Conference:

24-26 Aug. 2010