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Health monitoring method for load assessment in reliability design of printed circuit board

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5 Author(s)
Kenji Hirohata ; Toshiba Corporation, Corporate Research & Development Center 1, Komukai-Toshiba-cho, Saiwai-ku, Kanagawa, 212-8582, Japan ; Katsumi Hisano ; Yosuke Hisakuni ; Takahiro Omori
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Health monitoring technologies, which can evaluate the performance degradation, load history and degree of fatigue, have the potential to improve the maintenance, the reliability design method and the availability in improper use conditions of electronic equipment. In this paper, we propose a method to assess the cooling performance degradation and load history of printed circuit boards by use of a hierarchical Bayes model based on CAE results of stress simulation and experiment data from actual measurements. We applied this method to note PC. It is confirmed that this method can estimate the structural response index distribution of the printed circuit board from monitoring variables, and that the statistical load assessment concerning cyclic load and the maximum load distribution can be conducted.

Published in:

2010 IEEE CPMT Symposium Japan

Date of Conference:

24-26 Aug. 2010