This paper presents an improved amplifier compensation scheme for driving large capacitive loads. The dual-path compensated amplifier topology requires two parallel high speed paths for signal propagation and offers better performances than previously reported compensation schemes. The goal of this work was to improve this type of architecture in order to achieve lower power consumption, bandwidth extension and slew rate improvement, while reducing the compensation capacitors size and, therefore, the overall chip area.
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Electronics and Telecommunications (ISETC), 2010 9th International Symposium on
Date of Conference: 11-12 Nov. 2010