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A Frequency Model of a Continuously Driven Clocked CMOS Comparator

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5 Author(s)
Okura, S. ; Grad. Sch. of Eng., Osaka Univ., Suita, Japan ; Shibata, H. ; Okura, T. ; Ido, T.
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A frequency model of a continuously driven clocked CMOS comparator with the effect of the input signal during regeneration is presented. The model utilizes a small-signal linear model derived from the theoretical analysis of the comparison error caused by the transition from the tracking mode to the regeneration mode. The comparison error voltage is a function of input signal frequency and is represented with the transfer function. The correctness of the model is assured by several transistor-level simulation results. The model provides a valuable insight for the design of high-speed comparators.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:57 ,  Issue: 12 )