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This paper presents a novel hardware implementation of the adaptive JPEG-LS in field programmable gate array (FPGA), based on the low complexity lossless compression for images (LOCO-I) compression scheme. Differently from what previously reported in literature, this design achieves a much lower complexity and super high data throughput through an improved prediction model by breaking the feedback loop of context parameters updating. The processing speed of this design is up to 75Mpixels per second, while the compression ratio is slightly lower than the standard JPEG-LS compression. Performance evaluation also indicates that design complexity and compression efficiency can be taken account at the same time to achieve satisfactory result. Such an implementation could be used for high-speed compression of satellite remote sensing image onboard.
Date of Conference: 29-31 Oct. 2010