Referenced Items are not available for this document.
This paper presents an accurate compact scalable RLCG (Resistance, Inductance, Capacitance, and Conductance) model for electrical modeling of through-silicon vias in 3D IC packaging. Closed-form formulas for R and L are derived by full-wave approach, while C and G are taken from static solutions. The equivalent circuit model can capture almost all the parasitic effects, such as skin, proximity and MOS capacitance effect of through-silicon vias and the effect of lossy silicon. Therefore, it yields accurate results comparable to the full-wave solver.
Published in:
Signals Systems and Electronics (ISSSE), 2010 International Symposium on
(Volume:2
)
Date of Conference: 17-20 Sept. 2010
- Page(s):
- 1 - 4
- Print ISBN:
- 978-1-4244-6352-7
- INSPEC Accession Number:
- 11597764
- Conference Location :
- Nanjing
- Digital Object Identifier :
- 10.1109/ISSSE.2010.5606942
- Product Type:
- Conference Publications
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