Yield prediction models and critical area calculations based on on defects modeled as circular disks. But, the observation of real defects provides mostly irregular defect outlines. For this reason, we investigate the influence of real defect outlines on determining defect size distributions for yield prediction. To collect data on defects, checkerboard test structures were manufactured that enable a precise localization of defects inside large chip areas. Furthermore, we introduce a methodology to calculate a general defect size distribution that includes variety of real defect outlines. So, this realistic size distribution will be compared to defect size distributions based on known yield models to describe defect outlines
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Advanced Semiconductor Manufacturing Conference and Workshop, 1996. ASMC 96 Proceedings. IEEE/SEMI 1996
Date of Conference: 12-14 Nov 1996