By Topic

Capacity planning for development wafer fab expansion

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
W. Chou ; Fujitsu Comput. Packaging Technol. Inc., San Jose, CA, USA ; J. Everton

The simulation model described offers many different opportunities for increasing understanding of a development wafer fab. The results of simulation runs must be analyzed with an understanding of the effect of randomness on the model. Multiple random number runs might be required to confirm a model result. Simulation models can account for dynamic interactions between wafers, tools and operators. The variety of statistics can be used to better understand and interpret the model results. Simulation provides the benefit of experimenting with the fab without buying equipment. In the case of Fujitsu, production volumes were increasing. The model provided information on staffing requirements and new tool acquisitions required to support higher levels of production

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 1996. ASMC 96 Proceedings. IEEE/SEMI 1996

Date of Conference:

12-14 Nov 1996