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Clocking Links in Multi-chip Packages: A Case Study

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7 Author(s)
Ali, T. ; Sun Labs., Oracle, Menlo Park, CA, USA ; Patil, D. ; Liu, F. ; Alon, E.
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This brief note presents a case study for clocking links in multi-chip packages. A particular co-packaged multichip system design based on multi-Gbps silicon photonics global interconnect provides the context for our study of near-short range links, and we explore its design space. A preliminary exploration of phase noise suggests that the links should be clocked mesochronously, with an optically distributed full-rate clock and using local phase adjustment at each receiver.

Published in:

High Performance Interconnects (HOTI), 2010 IEEE 18th Annual Symposium on

Date of Conference:

18-20 Aug. 2010