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This paper presents the design and measurement results of an error ADC with a pipeline structure for DC-DC converter digital controller in 0.13μm technology. The proposed error ADC shared by three voltage rails through an analog MUX. The error signal is amplified by a differential amplifier and a switched capacitor amplifier with a total gain of 10. The amplified error signal is then digitized with a conventional 5b pipeline ADC. The ADC operates at a sampling frequency of 12 MSPS, draws 3mA from a single 1.5V power supply with an area of 500μm by 600μm. Metal fringe capacitors are used for switched-capacitor circuit.
Published in:
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Date of Conference: 1-4 Aug. 2010
- Page(s):
- 25 - 28
- ISSN :
- 1548-3746
- Print ISBN:
- 978-1-4244-7771-5
- INSPEC Accession Number:
- 11475664
- Conference Location :
- Seattle, WA
- Digital Object Identifier :
- 10.1109/MWSCAS.2010.5548552
- Product Type:
- Conference Publications
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