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One-dimensional analytical modeling of the VDMOS transistor taking into account the thermoelectrical interactions

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3 Author(s)
C. Lallement ; Dept. of Electr. Eng., Swiss Federal Inst. of Technol., Lausanne, Switzerland ; R. Bouchakour ; T. Maurel

An analytical one-dimensional thermoelectrical model for the power MOSFET transistor (VDMOS transistor) has been developed and implemented in the Saber circuit simulator. The device temperature becomes an interactive variable during the simulation. The model results in the combination of the electrical model of the device with a thermal network which models the different material layers crossed by the heat flow from the silicon chip to the heatsink (conduction phenomenon), and also takes into account the radiation and convection phenomena. The accuracy of the model is evaluated with electrical and thermal characterizations, and with a validation circuit

Published in:

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications  (Volume:44 ,  Issue: 2 )