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VLSI design of the reassembly management for ATM/AAL

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4 Author(s)
Ching-Lung Chang ; Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan ; Chen, S.-T. ; Yuan-Sun Chu ; Kim-Joan Chen

The reassembly management is one of the key components in the ATM receiving function. To achieve high memory efficiency, we adopt a shared memory approach with the linked-list structure to support the ATM/AAL reassembly management. The chip with the die size 6570×6490 μm 2 and packaged in a 144-pin CQFP is fabricated by using TSMC 0.8 μm SPDM N-well CMOS technology. The designed chip can simultaneously support 256 connections and manage 3 Mbytes of the receiving buffer

Published in:

ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International

Date of Conference:

23-27 Sep 1996