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The concept of compressive acquisition image sensor is to compress data while sensing and prior to storage. In this paper, the concept of compressive acquisition image sensor is developed, implemented and experimentally validated for both spatial and temporal domains. In the proposed scheme, the image sensor array is divided into quadrants integrating logic circuitry which performs online spatial compression of the raw data prior to storage. The quadrants are subsequently further classified into background/non-background quadrants by an off-array judge logic which enables to adaptively track the associated temporal information. Temporal redundancy between frames is hence removed in the readout phase. The proposed compressive acquisition algorithm is simulated and experimentally validated for both spatial and temporal domains through a hardware prototype. Experimental results show that the proposed algorithm enables more than 50% memory saving at a PSNR level of 26 dB with around 0.5 BPP. This result not only greatly reduces the memory requirements for a digital pixel CMOS image sensor, but also results in area saving as data is only stored after being compressed.