A thin-film monocrystalline CMOS display technology has been realized by implementing a conventional NMOS inversion device and a PMOS accumulation device or PACC. In this paper, a charge-based model is introduced which provides the dc current-voltage characteristics of PACC devices. Derived directly from the Pao–Sah equation by applying the 1D Gauss' law, the model provides a expression for drain current valid from cutoff through accumulation. The model correctly predicts the influence of fixed charge at the silicon–glass interface on the I–V characteristics and shows excellent agreement for both transfer and output characteristics with results from 2D device simulation. The core model coupled with previously developed equations describing channel length modulation, subthreshold slope degradation, drain induced barrier lowering, and mobility degradation form a complete PACC model which is compared to measured results.