By Topic

Efficient simulation of multiprocessors through finite state machines

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Siegelin, C. ; Dept. Inf., Ecole Nat. Superieure des Telecommun., Paris, France ; O'Donnell, C. ; Finger, U.

This paper introduces a new approach to the implementation of event-driven multiprocessor simulators. Cache and memory behaviour is modelled through finite state machines which use a very limited amount of storage rather than a full execution context (CPU registers, stack). The resulting simulator design is conceptually simple and clean. Furthermore, we make the point that finite state machines can be scheduled faster. Our performance figures show that simulation overhead is lower than for comparable multiprocessor simulators

Published in:

EUROMICRO 96. Beyond 2000: Hardware and Software Design Strategies., Proceedings of the 22nd EUROMICRO Conference

Date of Conference:

2-5 Sep 1996