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On Built-In Self-Test for multipliers

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3 Author(s)
Mary D. Pulukuri ; Department of Electrical and Computer Engineering, Auburn University, Auburn, Alabama 36849-5201 USA ; George J. Starr ; Charles E. Stroud

We evaluate some of the previously proposed test algorithms and approaches for various types of multipliers. We present methods to effectively test multipliers independent of their architecture and to achieve greater than 99% single stuck-at gate-level fault coverage with a simple 8-bit or 9-bit binary up-counter and some multiplexers. Finally, we discuss testing the multipliers present in most current Field Programmable Gate Arrays (FGPAs).

Published in:

Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)

Date of Conference:

18-21 March 2010