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For systems that use hardware accelerators to combine multicore and multiprocess technology with libraries and computational kernels, the drawbacks are the complexity of the programming model and the corresponding verification of the software and validation of the system performance capabilities. In this paper, we describe a software approach to utilizing the compute power of the Cell Broadband Engine® processor and a cluster composed of x86-64 and IBM PowerXCell™ 8i processors integrated within a single hybrid compute node. We review past approaches to provide motivation for our development of the Data Communication and Synchronization (DaCS) library and Accelerated Library Framework (ALF), which enable developers to create new applications and adapt existing applications to exploit hybrid computing platforms. We follow with examples of porting existing x86-64 processor-based applications to the hybrid cluster platform in order to demonstrate the capabilities of ALF and DaCS and discuss how one application was extended to become a stress and performance test for various system components. Finally, we present the applicability of this programming model, accelerator design, and test architecture to other system architectures, applications, and workload segments.
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