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A novel silicide formation technique using millisecond anneal is reported for the first time, delivering superior silicide film morphology that translates electrically into significant yield improvement over a conventional soak anneal, without any degradation of transistor performances. In addition, we demonstrate how this new technique enables the integration of thin silicides required for further junction scaling, and demonstrate up to 6 nm gate length reduction and more than 1 decade junction leakage improvement.
Electron Devices Meeting (IEDM), 2009 IEEE International
Date of Conference: 7-9 Dec. 2009