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Integrated Microfluidic Cooling and Interconnects for 2D and 3D Chips

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5 Author(s)
Bing Dang ; IBM T.J. Watson Research Center, Yorktown Heights ; Muhannad S. Bakir ; Deepak Chandra Sekar ; Calvin R. King Jr.
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Power dissipation in microprocessors is projected to reach a level that may necessitate chip-level liquid cooling in the near future. An on-chip microchannel heat sink can reduce the total thermal interfaces between an integrated circuit chip and the convective cooling medium and therefore yield smaller junction-to-ambient thermal resistance. This paper reports the fabrication, assembly, and testing of a silicon chip with complementary metal-oxide-semiconductor process compatible microchannel heat sink and thermofluidic chip input/output (I/O) interconnects fabricated using wafer-level batch processing. Ultra-small form factor, low-cost fabrication and assembly (system integration) are achieved for 2D and 3D chips, as the microchannel heat sink is fabricated directly on back-side of each chip. Through-wafer electrical and fluidic vias are used to interconnect the monolithically integrated microchannel heat sink to thermofluidic chip I/O interconnections. The feasibility of the novel fluidic I/O interconnect is demonstrated through preliminary thermal resistance measurements.

Published in:

IEEE Transactions on Advanced Packaging  (Volume:33 ,  Issue: 1 )