Skip to Main Content
Power delivery net (PDN) is vital for FPGA and structural ASIC devices packages to deliver power supply with high fidelity from system board to IC chips, which requires low impedance maintained over the entire frequency range of device under operation. Many efforts have been spent to lower PDN impedance, including increased use of on-die, on-package and on-PCB decoupling capacitances. In this study the authors use bare substrate of an engineering package to set stage for PDN design factors discussion. To make it a comprehensive study, the authors analyze the factors which affecting PDN performance from both modeling and hardware measurement perspective, and perform a correlation study for both aspects.
Date of Conference: 9-11 Dec. 2009