Referenced Items are not available for this document.
In order to reduce jitters, both incoming and inherent, this article proposes a novel configuration. Feed-forward compensator improves jitter filtration, free from constraints on loop gain for reducing inherent jitters. Its effectiveness is verified on a prototype implemented on an FPGA, and experiments as a multiply-by-50 synthesizer result in 30-times reduction of inherent jitters and in halving of incoming jitters.
Published in:
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Date of Conference: 13-16 Dec. 2009
- Page(s):
- 93 - 96
- E-ISBN :
- 978-1-4244-5091-6
- Print ISBN:
- 978-1-4244-5090-9
- INSPEC Accession Number:
- 11142080
- Conference Location :
- Yasmine Hammamet
- Digital Object Identifier :
- 10.1109/ICECS.2009.5410931
- Product Type:
- Conference Publications
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