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A sensitivity analysis of a new hardware-supported Global Synchronization Unit

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2 Author(s)
Elizabeth Whitaker Lynch ; School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332-0250 ; George F. Riley

Historically, large-scale low-lookahead parallel simulation has been a difficult problem. As a solution, we have designed a global synchronization unit (GSU) that would reside centrally on a multi-core chip and asynchronously compute the lower bound on time stamps (LBTS), the minimum timestamp of all unprocessed events in the simulation, on demand to synchronize conservative parallel simulators. Our GSU also accounts for transient messages, messages that have been sent but not yet processed by their recipient, eliminating the need for the simulator to acknowledge received messages. In this paper we analyze the sensitivity of simulation performance to the time required to access the GSU. The sensitivity analysis revealed that with GSU access times as high as hundreds of cycles, there was still a significant performance advantage over the baseline shared-memory implementation.

Published in:

2009 IEEE International Symposium on Modeling, Analysis & Simulation of Computer and Telecommunication Systems

Date of Conference:

21-23 Sept. 2009