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Two integrated nerve stimulator circuits are described. Both generate passively charge-balanced biphasic stimulating pulses of 1 to 16 mA with 10-??s to 1-ms widths from 6- to 24-V supplies for implanted book electrodes. In both circuits, the electrodes are floating during the passive discharge anywhere within the range of the power rails, which may be up to 24 V. The first circuit is used for stimulation only. It uses a floating depletion transistor to enable continuous discharge of the electrodes, except when stimulating, without using power. The second circuit also allows neural signals to be recorded from the same tripole. It uses a modified floating complementary metal-oxide semiconductor (CMOS) discharge switch capable of operating over a range beyond the gate-to-source voltage limits of its transistors. It remains off for long periods using no power while recording. A 0.6-??m silicon-on-insulator CMOS technology has been used. The measured performance of the circuits has been verified using multiple tripoles in saline.