By Topic

A novel architecture for a high-performance network processing unit: Flexibility at multiple levels of abstraction

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Hauger, S. ; Inst. of Commun. Networks & Comput. Eng. (IKR), Univ. Stuttgart, Stuttgart, Germany

Network processing devices in future, high-speed network nodes have to be capable of processing several hundred million packets per second. Additionally, they have to be easily adaptable to new processing tasks due to the introduction of new services or protocols. Field programmable gate arrays (FPGAs) and network processors are suitable devices fulfilling these requirements: The former offer configurability at register transfer level providing fine grain adaptability to unforeseen processing requirements and a high processing power. The latter are programmed at the more abstract software level and support high-speed execution of their fixed set of instructions. In this paper, we present a novel architecture for an FPGA-based high speed network processing unit offering programmable modules at multiple levels of abstraction: register-transfer level, microcode level, software level and parameter level. A prototypical implementation demonstrates its feasibility with today's field programmable gate array devices offering a throughput of more than one hundred million minimum sized packets per second.

Published in:

High Performance Switching and Routing, 2009. HPSR 2009. International Conference on

Date of Conference:

22-24 June 2009