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High-level test generation using symbolic scheduling

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2 Author(s)
M. C. Hansen ; Design Autom. Oper., Delco Electron. Corp., Kokomo, IN, USA ; J. P. Hayes

A high-level test generation algorithm SWIFT is proposed which incorporates a symbolic scheduling procedure, derived from high-level synthesis applications, to resolve decision conflicts during test generation. SWIFT uses the induced fault model to generate functional tests that guarantee detection of low-level structural faults. When applied to functional models of representative 74 X-series, ISCAS-85 and ISCAS-89 circuits. SWIFT produces test sequences that cover all gate-level stuck-at-faults. Surprisingly, although they are derived from a high-level functional description of the circuit under test, most of these test sequences are of provably minimal or near-minimal size

Published in:

Test Conference, 1995. Proceedings., International

Date of Conference:

21-25 Oct 1995