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Finding a tradeoff between host interrupt load and MPI latency over Ethernet

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2 Author(s)
Goglin, B. ; LaBRI, INRIA, Talence, France ; Furmento, N.

Achieving high-performance message passing on top of generic Ethernet hardware suffers from the NIC interrupt-driven model where coalescing is usually involved. We present an in-depth study of the impact of interrupt coalescing on the Open-MX performance. It shows that disabling coalescing may not be relevant for most metrics except small-message latency. Two new coalescing strategies are then presented so as to efficiently support both latency-friendly and coalescing-friendly workloads thanks to the NIC looking at Open-MX messages and streams before deciding when to raise interrupts. The implementation of these strategies in the firmware of Myri-10G NICs shows that Open-MX is now able to achieve a low small-message latency, a high large-message throughput, and a satisfying message rate without having to manually tune the coalescing delay depending on the benchmark. Real application performance evaluation further shows that our modifications even improve the NAS parallel benchmark IS execution time by 7-8% thanks to our NIC firmware raising up to 20% of additional interrupts at the correct time.

Published in:

Cluster Computing and Workshops, 2009. CLUSTER '09. IEEE International Conference on

Date of Conference:

Aug. 31 2009-Sept. 4 2009