This paper proposes a roadmap for an embedded system test strategy that uses IEEE Standard 1149.1 as a multidrop, addressable backplane test bus to provide test access by a central diagnostic processor to local diagnostics contained in flash memory chips located on each module. This proposal is an 1149.1 extension based upon the SCAN Bridge which in turn was based on Bhavsar's paper (1991) which extended 1149.1 as a backplane test bus. This roadmap also borrows some of the key features of IEEE P1149.5, a proposed standard backplane test bus
Published in:
Test Conference, 1994. Proceedings., International
Date of Conference: 2-6 Oct1994