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CMOS Nanostructures with Improved Temperature Behavior Using Double Differential Structures

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1 Author(s)
Popa, C.R. ; Fac. of Electron., Telecommun. & Inf. Technol., Univ. Politeh. of Bucharest, Bucharest, Romania

An original superior-order curvature-corrected integrated nanostructure will be presented. In order to improve the temperature behavior of the circuit, a double differential structure will be used, implementing linear and superior-order curvature corrections. The superior-order curvature-correction is achieved by taking the difference between two gate-source voltages of subthreshold-operated MOS transistors, biased at drain currents having different temperature dependencies: PTAT (Proportional To Absolute Temperature) and PTAT2. The SPICE simulations confirm the theoretical estimated results, showing a temperature coefficient under 11 ppm/K for an extended input range 223 K < T < 423 K and for a supply voltage of 1.8 V and a current consumption of about 1 muA results.

Published in:

Sensor Technologies and Applications, 2009. SENSORCOMM '09. Third International Conference on

Date of Conference:

18-23 June 2009