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In this paper we investigate the effects of supply voltage and the temperature on the characteristics of the static random access memory (SRAM). Two nanoscale SRAM cells based on carbon nanotube field effect transistors (CNFETs) and Silicon MOSFET Transistors (Si-MOSFETs) were investigated for application in 32 nm technology node. Simulation studies show that the stability of CNFET SRAM against supply voltage variation and temperature influences is larger than those of its Si-MOSFET SRAM counterpart. Furthermore, the circuit performance affected by these two parameters in a 32k SRAM array was investigated. The results show that the read access time in CNFET SRAM arrays based on chirality vectors bigger than (23,0), is less than conventional MOSFET SRAM array.
Date of Conference: 15-16 July 2009