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Application modelling and hardware description for network-on-chip benchmarking

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4 Author(s)
Salminen, E. ; Tampere Univ. of Technol., Tampere, Finland ; Grecu, C. ; Hamalainen, T.D. ; Ivanov, A.

Measuring and comparing performance, cost and other features of advanced communication architectures for complex multicore/multiprocessor systems on chip is a significant challenge which has hardly been addressed so far. This article presents a modelling concept for applications running on multicore systems and defines an extensible markup language (XML) format for documenting and distributing network-on-chip (NoC) benchmarks. It defines a black-box view of the processing elements that discloses only the computational aspects that are relevant in interacting with the on chip data transport mechanism. The purpose is to lay the groundwork for a standardised NoC benchmark set.

Published in:

Computers & Digital Techniques, IET  (Volume:3 ,  Issue: 5 )