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Risks and chances of many-core processors

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1 Author(s)
Uhrig, S. ; Univ. of Augsburg, Augsburg, Germany

The decreasing structure size of VLSI technology features a lot of chances to processor designers but it also brings many risks. Most of these risks stem from the manufacturing process and lead to an increased number of chips with defects which are uniformly distributed over the wafer. Other problems arise during the uptime of the system because of thermal effects or radiation. Happily, one of the chances is to integrate many complete processor cores together with a suitable network infrastructure into one single chip. Hence, it is not required that all processor cores of a multi- or many-core design definitely work well as it is the case in the PlayStation3. Moreover, using an appropriate virtualization layer together with some hardware support enables complex many-core systems to deal with temporary malfunctions and the occurrence of persistent defects. Both problems should be handled by a hardware/software cooperation under control of the virtualization engine and, hence, transparent to the application. As a result, we could gain a more reliable system in conjunction with a higher performance in spite of the additional virtualization layer. The talk presents both, some risks and some possibilities to deal with these risks using the opportunity to build a many-core processor as well as the chances given by the high number of cores per chip.

Published in:
High Performance Computing & Simulation, 2009. HPCS '09. International Conference on

Date of Conference: 21-24 June 2009

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