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Composition of the silicon-nitride charge trap layer strongly impacts electron and hole trap properties. This significantly impacts charge trap flash memory performance and reliability. Important trade-offs between program/erase (P/E) levels (memory window) and retention loss is shown and critical trends identified. Increasing the Si-richness of the SiN layer improves memory window by increasing erase efficiency. E-state retention characteristics are improved but at the expense of higher P-state retention loss.
Date of Conference: 1-2 June 2009