Referenced Items are not available for this document.
Composition of the silicon-nitride charge trap layer strongly impacts electron and hole trap properties. This significantly impacts charge trap flash memory performance and reliability. Important trade-offs between program/erase (P/E) levels (memory window) and retention loss is shown and critical trends identified. Increasing the Si-richness of the SiN layer improves memory window by increasing erase efficiency. E-state retention characteristics are improved but at the expense of higher P-state retention loss.
Published in:
Electron Devices and Semiconductor Technology, 2009. IEDST '09. 2nd International Workshop on
Date of Conference: 1-2 June 2009
- Page(s):
- 1 - 4
- E-ISBN :
- 978-1-4244-3832-7
- Print ISBN:
- 978-1-4244-3831-0
- INSPEC Accession Number:
- 10789008
- Conference Location :
- Mumbai
- Digital Object Identifier :
- 10.1109/EDST.2009.5166111
- Product Type:
- Conference Publications
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