Referenced Items are not available for this document.
Device scaling is critical for continuing trend of more functionality in a chip. Traditional planar CMOS scaling is increasingly difficult due to limitations in processing and material properties, device structure and reliability. In this paper we will summarize recent advances in these areas, which will enable technology scaling as per Moore's law.
Published in:
Electron Devices and Semiconductor Technology, 2009. IEDST '09. 2nd International Workshop on
Date of Conference: 1-2 June 2009
- Page(s):
- 1 - 4
- E-ISBN :
- 978-1-4244-3832-7
- Print ISBN:
- 978-1-4244-3831-0
- INSPEC Accession Number:
- 10788995
- Conference Location :
- Mumbai
- Digital Object Identifier :
- 10.1109/EDST.2009.5166098
- Product Type:
- Conference Publications
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