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As the semiconductor manufacturing technology moves to sub-micron device size, the need for rapid, sensitive and accurate fault detection and classification to enhance tool uptime and products yield increases. Wafer probe yield improvement at the wafer edge is a focus point for productivity and cost reduction on mature technologies. In this paper we describe how we correlate wafer probe test data and equipment data to build an efficient fault detection and classification monitoring. This leads to an advanced detection and prevention of excursions that usually affect the edge of the wafer for aluminium embedded EEPROM technology.
Date of Conference: 10-12 May 2009