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Double patterning (DP) has now become a fixture on the development roadmaps of many device manufacturers for half pitches of 32 nm and beyond. The line DP is a good candidate for logic applications. The most common sequence is litho1-etch1-litho2-etch2. This paper focuses on the development and the optimization of the two etching processes that independently control the transfer of the initial litho1 and litho2 CDs with a target of 45 nm/line & 45 nm/Space. This DP line process is extendable to the 32 nm node.