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Hades-towards the design of an asynchronous superscalar processor

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4 Author(s)
Elston, C.J. ; Div. of Comput. Sci., Hertfordshire Univ., Hatfield, UK ; Christianson, D.B. ; Findlay, P.A. ; Steven, G.B.

This paper uses Hades, a generic processor architecture aimed at single and multiple-instruction-issue asynchronous implementations, to illustrate some of the difficulties encountered in asynchronous processor design. Particular emphasis is placed on a decoupled operand forwarding mechanism which allows the last result of each functional unit to be forwarded to following instructions, yet completely separates forwarding from the register writeback operation

Published in:
Asynchronous Design Methodologies, 1995. Proceedings., Second Working Conference on

Date of Conference: 30-31 May 1995

Page(s):
200 - 209
Meeting Date :
30 May 1995-31 May 1995
Print ISBN:
0-8186-7098-3
INSPEC Accession Number:
5044987
Conference Location :
London
Digital Object Identifier :
10.1109/WCADM.1995.514657
Product Type:
Conference Publications

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