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Robust testing for stuck-at faults

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2 Author(s)
Chakraborty, T.J. ; AT&T Bell Labs., Princeton, NJ, USA ; Agrawal, V.D.

This paper proposes a generalization of robust tests with respect to assumptions about fault models and circuit models. The specific case of d-robust tests for single stuck-at faults is studied. These tests maintain their validity in the presence of macro-delay faults. A macro-delay of size n means that the delay of all combinational paths can be in the range [O,nT] where T is the clock period. We give a simple method of duplicating a test vector n times to produce a d-robust test for a stuck-at fault in a combinational circuit. We further implement a more complex algorithm to derive d-robust tests for stuck-at faults in sequential circuits

Published in:

VLSI Design, 1995., Proceedings of the 8th International Conference on

Date of Conference:

4-7 Jan 1995