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A CMOS 12-bit 4 MHz pipelined A/D converter with commutative feedback capacitor

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2 Author(s)
Jungwook Yang ; Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA ; Hae-Seung Lee

A 2-bit/stage CMOS 12-bit 4 MHz pipelined A/D converter (ADC) using commutated feedback capacitor switching scheme is presented. The technique improves the DNL without using complicated calibration circuitry, nor requiring extra calibration cycle. Approximately, only 7-bit matched capacitors are required for 12-bit ADC's. Very high output swing is achieved in a gain enhanced folded cascode amplifier by operating output stage transistors in the triode region. This 12-bit pipelined ADC is integrated in a standard 0.8 μm single poly, triple metal CMOS process, and dissipates 45 mW

Published in:

Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996

Date of Conference:

5-8 May 1996