If ignored, power-on contention will eventually become intolerable. If ignored on current processes it will lead to increased fallout at burn-in. On future processes it may lead to fallout at the normal operating supply for a chip. Fortunately, a straightforward design solution is available which permits a chip to avoid power-on contention failures. The authors describe this design solution.
Published in:
VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on
Date of Conference: 13-15 June 1996