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Limitations and challenges of multi-gigabit DRAM circuits

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4 Author(s)
K. Itoh ; Central Res. Labs., Hitachi Ltd., Tokyo, Japan ; Y. Nakagome ; S. Kimura ; T. Watanabe

Limitations and challenges concerning multi-gigabit DRAM circuits were discussed in terms of high-density devices, high-performance circuits, and low-power/low-voltage circuits. There are many challenges related to MOSFET performance degradation, ever-lower cell-capacitance and stored voltage, increasingly complicated designs for high-speed chips, and increasing subthreshold-currents. Genuine breakthroughs are needed to overcome these challenges, and combined with the creation of new markets for multi-gigabit DRAMs, these anticipated breakthroughs will make the semiconductor industry more prosperous through the 21st century.

Published in:

VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on

Date of Conference:

13-15 June 1996