By Topic

Doping fin field-effect transistor sidewalls: Impurity dose retention in silicon due to high angle incident ion implants and the impact on device performance

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
8 Author(s)
Duffy, R. ; NXP Semiconductors, Kapeldreef 75, 3001 Leuven, Belgium ; Curatola, G. ; Pawlak, B.J. ; Doornbos, G.
more authors

Your organization might have access to this article on the publisher's site. To check, click on this link: 

The three dimensional (3D) nature of a fin field-effect transistor (FinFET) structure creates new challenges for an impurity doped region formation. For the triple gate FinFET, both top and side surfaces require high levels of dopant incorporation to minimize access resistance. In this work, we investigate the use of conventional ion implantation for the introduction of impurities in this 3D silicon structure. Specifically, we evaluate sidewall impurity dose retention at various angles of incidence. The retention of dose is determined by (i) trigonometry of the implant angle in the 3D fin system, (ii) backscattering, and (iii) material properties of the target surface. Dose retention is most sensitive to the implant angle. For a fixed implant projected range, lighter ions are more likely to be ejected from the target. Thus, heavier ions are better for dose retention. The influence of sidewall dose retention on the electrical performance of fully depleted FinFETs was investigated by means of 3D device simulation. Drive current and short channel effect control are more sensitive to dose retention on sidewalls than to dopant conformality.

Published in:

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:26 ,  Issue: 1 )