A detailed description of the application of the convergent beam electron diffraction (CBED) technique for studying strain propagation in the Si1-xGex/Si blanket wafers as well as silicon-based metal–oxide–semiconductor field-effect transistors is presented. Specifically, a simple and robust experimental procedure and analysis for silicon lattice strain measurement using the CBED technique is detailed in this article. The use of focused ion beam milling allows for better control of the thickness and site-specific analysis, especially for nanoscaled devices. A pictorial representation of the analytical conditions for the higher order Laue zone lines in CBED patterns is also reported in this work. Based on the Si lattice strain measurement results, we determined that a thin buffer layer of SiOxNy incorporated below the Si3N4 overlay film could render the uniaxial channel strain less compressive. Stress studied on Si1-xGex/Si blanket wafers reveals that a steeper SiGe compositional gradient would induce larger biaxial strain in the underlying Si substrate and hence a smaller amount of misfit dislocations.