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Implementation of synthesized digital systems with VHDL

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2 Author(s)
Ng, L.S. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore ; Jong, C.C.

This paper presents a software system for implementing synthesized digital designs using VHDL so that the designs can be accepted by existing CAD systems to achieve low-level verification such as delay analysis and logic simulation as well as layout realization in various technologies

Published in:

Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on

Date of Conference:

6-10 Nov 1995