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Front grid design in industrial silicon solar cells: Modelling to evaluate the behaviour of three vs. two buses cell patterns

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5 Author(s)
Caballero, L.J. ; Isofotón S.A., c/ Severo Ochoa 50, Parque Tecnológico de Andalucía, 29590 Málaga, Spain ; Martinez, A. ; Sanchez-Friera, P. ; Vazquez, M.A.
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The increase in size of the silicon wafers that has been followed by the present industry makes raise the current that cells can provide. Thus, series resistance of the cells introduces a power loss that also tends to rise.

Published in:

Photovoltaic Specialists Conference, 2008. PVSC '08. 33rd IEEE

Date of Conference:

11-16 May 2008