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Variations in defect distributions and device yield patterns can provide significant information about the performance of processes used in the fabrication of integrated circuits. This paper describes how signature analysis and visual/electrical correlation were used to identify yield loss mechanisms during the start-up and production ramp of MOS 12, Motorola's newest 8-inch high volume wafer fab. The identification, diagnosis, and resolution of two yield issues are presented as case studies,.
Date of Conference: 13-15 Nov 1995