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We combine customary pulsed I- V setup with a simple linear drain-current correction method to provide a possible standard for NBTI characterization. The method is implemented using standard equipment and yet is able to achieve sub-100-ns delay, the shortest reported to date for a wafer-level setup. Unlike the ramped-voltage method for which synchronization of the gate and drain waveforms is critical, relative delay between the gate and drain signals is not a concern in our case since measurement is made during quasi-steady state. For the present setup, gate and drain signals are shown to ldquostabilizerdquo after ~50 ns (upon switching) for a gate capacitive load of 1.5 pF (equivalent to ~80 devices used in this letter), rendering parallel testing possible using a single gate voltage source. Extension of the method for direct threshold voltage extraction by the constant subthreshold drain current approach is also discussed.
Date of Publication: March 2009