By Topic

Low-Leakage Storage Cells for Ternary Content Addressable Memories

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Mohan, N. ; Boston Design Center, Adv. Micro Devices Inc., Boxborough, MA ; Sachdev, M.

Innovative architectural and circuit techniques are reducing the dynamic power in ternary content addressable memories (TCAMs). Also, shrinking device dimensions are making transistors increasingly leaky. Due to these two trends, the static power is becoming a significant portion of the total TCAM power. This paper presents two novel ternary storage cells that exploit the unique properties of TCAMs for reducing the cell leakage. Simulation results of the proposed cells show up to 40% leakage reduction over the conventional TCAM cell at the expense of a small degradation (<8%) in the static noise margin (SNM). The SNM degradation is negligible (<1%) for lower power supply voltages (<0.8 V). Measurement results of a test chip in 0.18-mum CMOS technology demonstrate that the proposed cells can perform read and write operations in less than 3.6 ns.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:17 ,  Issue: 5 )